mMachine/mCode

For the final part of the CS450 project, you are to complete a fully functional mPascal compiler. Since it would be impractical to have you generate assembly code for a real machine (with all the intricacies of the target machine), we have created a virtual machine that has been designed specifically for a mPascal compiler. The mMachine (and is associated assembly language mCode) greatly simplifies the task of code generation while still requiring you to handle many of the problems faced by other compiler writers.

At this point in time, you should have written a scanner and parser for mPascal, should be working on the symbol table and should be thinking about semantic processing and code generation. The following information about the mMachine and mCode is provided to assist you in your design and implementation of the remaining parts of the mPascal compiler project:

mMachine Specification:

The mMachine is a virtual machine (simulated by a program) with the following hardware characteristics:

Separate instruction space (for assembly code) and RAM (for data storage/retrieval)

10 general purpose registers (D0 - D9)

Special stack pointer register (SP)

The mMachine is a stack-based machine; all memory is allocated/deallocated on the data stack residing in RAM:

The data stack consists of single, integer locations (size is 1)

The data stack grows upwards (starts at 0, pushes increment the SP, pops decrement the SP)

mCode Specifications:

mCode (assembly language) is based on QUADRUPLES. Each quadruple consists of an opcode and up to three operands.
Opcodes:

At present there are 26 valid opcodes (instructions) in the mCode assembly language...
HLT
RD      WRT     WRTS
MOV     NEG     ADD     SUB     MUL     DIV
PUSH    POP
NEGS    ADDS    SUBS    MULS    DIVS
BR      BEQ     BGE     BGT     BLE     BLT     BNE
CALL    RET

Operands:

MODE FORM SAMPLE DESCRIPTION

IMMEDIATE #n #4 Literal value

REGISTER Dn D6 Contents of register n

INDEXED m(Dn) 5(D3) Address = Dn + m

INDIRECT @m(Dn) @7(D1) Address = Contents of (Dn + m)

STACK REGISTER SP SP Stack pointer

STACK INDEXED m(SP) 6(SP) Address = SP + m

STACK INDIRECT @m(SP) @2(SP) Address = Contents of (SP + m)

Labels:

Labels are specified with either Ln: (defining a label) or Ln (using a label).

MODE	FORM	SAMPLE	DESCRIPTION
IMMEDIATE	#n	#4	Literal value

REGISTER	Dn	D6	Contents of register n
INDEXED	m(Dn)	5(D3)	Address = Dn + m
INDIRECT	@m(Dn)	@7(D1)	Address = Contents of (Dn + m)

STACK REGISTER	SP	SP	Stack pointer
STACK INDEXED	m(SP)	6(SP)	Address = SP + m
STACK INDIRECT	@m(SP)	@2(SP)	Address = Contents of (SP + m)

mCode Quick Reference Page

INSTRUCTION	DESCRIPTION
`HLT`	`Terminate program execution`

`RD dst`	`Read a value from the keyboard into dst`
`WRT src`	`Write a value in src to the screen`
`WRTS`	`Performs: POP A WRT A`

`MOV src dst`	`Performs: dst <- src`
`NEG src dst`	`Performs: dst <- -src`
`ADD src1 src2 dst`	`Performs: dst <- src1 + src2`
`SUB src1 src2 dst`	`Performs: dst <- src1 - src2`
`MUL src1 src2 dst`	`Performs: dst <- src1 * src2`
`DIV src1 src2 dst`	`Performs: dst <- src1 / src2`

`PUSH src`	`Push src onto the data stack`
`POP dst`	`Pop the stack top into dst`
`NEGS`	`Performs: POP A PUSH -A`
`ADDS`	`Performs: POP A POP B PUSH B + A`
`SUBS`	`Performs: POP A POP B PUSH B - A`
`MULS`	`Performs: POP A POP B PUSH B * A`
`DIVS`	`Performs: POP A POP B PUSH B / A`

`Ln:`	`Drop a label at the current line`
`BR Ln`	`Branch to label n`
`BEQ src1 src2 Ln`	`Branch to label n if src1 = src2`
`BGE src1 src2 Ln`	`Branch to label n if src1 >= src2`
`BGT src1 src2 Ln`	`Branch to label n if src1 > src2`
`BLE src1 src2 Ln`	`Branch to label n if src1 <= src2`
`BLT src1 src2 Ln`	`Branch to label n if src1 < src2`
`BNE src1 src2 Ln`	`Branch to label n if src1 <> src2`

`CALL Ln`	`Performs: PUSH PC BR Ln`
`RET`	`Performs: POP PC`