\section{include/lnp/sys/irq.h File Reference}
\label{irq_8h}\index{include/lnp/sys/irq.h@{include/lnp/sys/irq.h}}
Internal LNP Interface: RCX redirected IRQ vectors. 

\subsection*{Defines}
\begin{CompactItemize}
\item 
\#define {\bf HANDLER\_\-WRAPPER}(wrapstring, handstring)
\end{CompactItemize}
\subsection*{Functions}
\begin{CompactItemize}
\item 
void {\bf rom\_\-ocia\_\-handler} ()
\begin{CompactList}\small\item\em ROM OCIA interrupt handler. \item\end{CompactList}\item 
void {\bf rom\_\-ocia\_\-return} ()
\begin{CompactList}\small\item\em return address in ROM OCIA handler \item\end{CompactList}\item 
void {\bf rom\_\-dummy\_\-handler} ()
\begin{CompactList}\small\item\em address of an RTS instruction \item\end{CompactList}\item 
void {\bf disable\_\-irqs} ()
\begin{CompactList}\small\item\em disable interrupt processing \item\end{CompactList}\item 
void {\bf enable\_\-irqs} ()
\begin{CompactList}\small\item\em enable interrupt processing \item\end{CompactList}\end{CompactItemize}
\subsection*{Variables}
\begin{CompactItemize}
\item 
void $\ast$ {\bf reset\_\-vector}
\begin{CompactList}\small\item\em reset vector \item\end{CompactList}\item 
void $\ast$ {\bf nmi\_\-vector}
\begin{CompactList}\small\item\em NMI interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf irq0\_\-vector}
\begin{CompactList}\small\item\em IRQ0 interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf irq1\_\-vector}
\begin{CompactList}\small\item\em IRQ1 interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf irq2\_\-vector}
\begin{CompactList}\small\item\em IRQ2 interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf icia\_\-vector}
\begin{CompactList}\small\item\em ICIA interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf icib\_\-vector}
\begin{CompactList}\small\item\em ICIB interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf icic\_\-vector}
\begin{CompactList}\small\item\em ICIC interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf icid\_\-vector}
\begin{CompactList}\small\item\em ICID interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf ocia\_\-vector}
\begin{CompactList}\small\item\em OCIA interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf ocib\_\-vector}
\begin{CompactList}\small\item\em OCIB interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf fovi\_\-vector}
\begin{CompactList}\small\item\em FOVI interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf cmi0a\_\-vector}
\begin{CompactList}\small\item\em CMI0A interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf cmi0b\_\-vector}
\begin{CompactList}\small\item\em CMI0B interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf ovi0\_\-vector}
\begin{CompactList}\small\item\em OVI0 interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf cmi1a\_\-vector}
\begin{CompactList}\small\item\em CMI1A interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf cmi1b\_\-vector}
\begin{CompactList}\small\item\em CMI1B interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf ovi1\_\-vector}
\begin{CompactList}\small\item\em OVI1 interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf eri\_\-vector}
\begin{CompactList}\small\item\em ERI interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf rxi\_\-vector}
\begin{CompactList}\small\item\em RXI interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf txi\_\-vector}
\begin{CompactList}\small\item\em TXI interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf tei\_\-vector}
\begin{CompactList}\small\item\em TEI interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf ad\_\-vector}
\begin{CompactList}\small\item\em A/D interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf wovf\_\-vector}
\begin{CompactList}\small\item\em WOVF interrupt vector. \item\end{CompactList}\item 
void $\ast$ {\bf rom\_\-reset\_\-vector}
\begin{CompactList}\small\item\em ROM reset vector. \item\end{CompactList}\end{CompactItemize}


\subsection{Detailed Description}
Internal LNP Interface: RCX redirected IRQ vectors. 

\begin{Desc}
\item[Author:]Markus L. Noga $<${\tt markus@noga.de}$>$\end{Desc}
Lego Mindstorms RCX IRQ redirection vector table All redirected handlers can assume r6 to be saved All redirected handlers must return with rts, $\ast$not$\ast$ rte.

\begin{Desc}
\item[Warning:]Incomplete.\end{Desc}


Definition in file {\bf irq.h}.

\subsection{Define Documentation}
\index{irq.h@{irq.h}!HANDLER_WRAPPER@{HANDLER\_\-WRAPPER}}
\index{HANDLER_WRAPPER@{HANDLER\_\-WRAPPER}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}\#define HANDLER\_\-WRAPPER(wrapstring, handstring)}\label{irq_8h_a0}


{\bf Value:}

\footnotesize\begin{verbatim}__asm__ (".text\n.align 1\n.global _" wrapstring "\n_" wrapstring \
": push r0\npush r1\npush r2\npush r3\njsr @_" handstring \
"\npop r3\npop r2\npop r1\npop r0\nrts\n")
\end{verbatim}\normalsize 


Definition at line 48 of file irq.h.

\subsection{Function Documentation}
\index{irq.h@{irq.h}!disable_irqs@{disable\_\-irqs}}
\index{disable_irqs@{disable\_\-irqs}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void disable\_\-irqs ()\hspace{0.3cm}{\tt  [inline]}}\label{irq_8h_a29}


disable interrupt processing 



Definition at line 98 of file irq.h.

References \_\-\_\-asm\_\-\_\-().

Referenced by rom\_\-reset().\index{irq.h@{irq.h}!enable_irqs@{enable\_\-irqs}}
\index{enable_irqs@{enable\_\-irqs}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void enable\_\-irqs ()\hspace{0.3cm}{\tt  [inline]}}\label{irq_8h_a30}


enable interrupt processing 



Definition at line 103 of file irq.h.

References \_\-\_\-asm\_\-\_\-().\index{irq.h@{irq.h}!rom_dummy_handler@{rom\_\-dummy\_\-handler}}
\index{rom_dummy_handler@{rom\_\-dummy\_\-handler}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void rom\_\-dummy\_\-handler ()}\label{irq_8h_a28}


address of an RTS instruction 

\index{irq.h@{irq.h}!rom_ocia_handler@{rom\_\-ocia\_\-handler}}
\index{rom_ocia_handler@{rom\_\-ocia\_\-handler}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void rom\_\-ocia\_\-handler ()}\label{irq_8h_a26}


ROM OCIA interrupt handler. 

\index{irq.h@{irq.h}!rom_ocia_return@{rom\_\-ocia\_\-return}}
\index{rom_ocia_return@{rom\_\-ocia\_\-return}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void rom\_\-ocia\_\-return ()}\label{irq_8h_a27}


return address in ROM OCIA handler 



\subsection{Variable Documentation}
\index{irq.h@{irq.h}!ad_vector@{ad\_\-vector}}
\index{ad_vector@{ad\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf ad\_\-vector}}\label{irq_8h_a23}


A/D interrupt vector. 

\index{irq.h@{irq.h}!cmi0a_vector@{cmi0a\_\-vector}}
\index{cmi0a_vector@{cmi0a\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf cmi0a\_\-vector}}\label{irq_8h_a13}


CMI0A interrupt vector. 

\index{irq.h@{irq.h}!cmi0b_vector@{cmi0b\_\-vector}}
\index{cmi0b_vector@{cmi0b\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf cmi0b\_\-vector}}\label{irq_8h_a14}


CMI0B interrupt vector. 

\index{irq.h@{irq.h}!cmi1a_vector@{cmi1a\_\-vector}}
\index{cmi1a_vector@{cmi1a\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf cmi1a\_\-vector}}\label{irq_8h_a16}


CMI1A interrupt vector. 

\index{irq.h@{irq.h}!cmi1b_vector@{cmi1b\_\-vector}}
\index{cmi1b_vector@{cmi1b\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf cmi1b\_\-vector}}\label{irq_8h_a17}


CMI1B interrupt vector. 

\index{irq.h@{irq.h}!eri_vector@{eri\_\-vector}}
\index{eri_vector@{eri\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf eri\_\-vector}}\label{irq_8h_a19}


ERI interrupt vector. 

\index{irq.h@{irq.h}!fovi_vector@{fovi\_\-vector}}
\index{fovi_vector@{fovi\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf fovi\_\-vector}}\label{irq_8h_a12}


FOVI interrupt vector. 

\index{irq.h@{irq.h}!icia_vector@{icia\_\-vector}}
\index{icia_vector@{icia\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf icia\_\-vector}}\label{irq_8h_a6}


ICIA interrupt vector. 

\index{irq.h@{irq.h}!icib_vector@{icib\_\-vector}}
\index{icib_vector@{icib\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf icib\_\-vector}}\label{irq_8h_a7}


ICIB interrupt vector. 

\index{irq.h@{irq.h}!icic_vector@{icic\_\-vector}}
\index{icic_vector@{icic\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf icic\_\-vector}}\label{irq_8h_a8}


ICIC interrupt vector. 

\index{irq.h@{irq.h}!icid_vector@{icid\_\-vector}}
\index{icid_vector@{icid\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf icid\_\-vector}}\label{irq_8h_a9}


ICID interrupt vector. 

\index{irq.h@{irq.h}!irq0_vector@{irq0\_\-vector}}
\index{irq0_vector@{irq0\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf irq0\_\-vector}}\label{irq_8h_a3}


IRQ0 interrupt vector. 

\index{irq.h@{irq.h}!irq1_vector@{irq1\_\-vector}}
\index{irq1_vector@{irq1\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf irq1\_\-vector}}\label{irq_8h_a4}


IRQ1 interrupt vector. 

\index{irq.h@{irq.h}!irq2_vector@{irq2\_\-vector}}
\index{irq2_vector@{irq2\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf irq2\_\-vector}}\label{irq_8h_a5}


IRQ2 interrupt vector. 

\index{irq.h@{irq.h}!nmi_vector@{nmi\_\-vector}}
\index{nmi_vector@{nmi\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf nmi\_\-vector}}\label{irq_8h_a2}


NMI interrupt vector. 

\index{irq.h@{irq.h}!ocia_vector@{ocia\_\-vector}}
\index{ocia_vector@{ocia\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf ocia\_\-vector}}\label{irq_8h_a10}


OCIA interrupt vector. 

\index{irq.h@{irq.h}!ocib_vector@{ocib\_\-vector}}
\index{ocib_vector@{ocib\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf ocib\_\-vector}}\label{irq_8h_a11}


OCIB interrupt vector. 

\index{irq.h@{irq.h}!ovi0_vector@{ovi0\_\-vector}}
\index{ovi0_vector@{ovi0\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf ovi0\_\-vector}}\label{irq_8h_a15}


OVI0 interrupt vector. 

\index{irq.h@{irq.h}!ovi1_vector@{ovi1\_\-vector}}
\index{ovi1_vector@{ovi1\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf ovi1\_\-vector}}\label{irq_8h_a18}


OVI1 interrupt vector. 

\index{irq.h@{irq.h}!reset_vector@{reset\_\-vector}}
\index{reset_vector@{reset\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf reset\_\-vector}}\label{irq_8h_a1}


reset vector 



Referenced by kmain().\index{irq.h@{irq.h}!rom_reset_vector@{rom\_\-reset\_\-vector}}
\index{rom_reset_vector@{rom\_\-reset\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf rom\_\-reset\_\-vector}}\label{irq_8h_a25}


ROM reset vector. 

\index{irq.h@{irq.h}!rxi_vector@{rxi\_\-vector}}
\index{rxi_vector@{rxi\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf rxi\_\-vector}}\label{irq_8h_a20}


RXI interrupt vector. 

\index{irq.h@{irq.h}!tei_vector@{tei\_\-vector}}
\index{tei_vector@{tei\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf tei\_\-vector}}\label{irq_8h_a22}


TEI interrupt vector. 

\index{irq.h@{irq.h}!txi_vector@{txi\_\-vector}}
\index{txi_vector@{txi\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf txi\_\-vector}}\label{irq_8h_a21}


TXI interrupt vector. 

\index{irq.h@{irq.h}!wovf_vector@{wovf\_\-vector}}
\index{wovf_vector@{wovf\_\-vector}!irq.h@{irq.h}}
\subsubsection{\setlength{\rightskip}{0pt plus 5cm}void$\ast$ {\bf wovf\_\-vector}}\label{irq_8h_a24}


WOVF interrupt vector. 

